Additional Resources

Some resources I thought were useful references while learning and teaching FPGA design.

Quick Verilog Reference (for quick syntax checks and tips)

https://web.stanford.edu/class/ee183/handouts_win2003/VerilogQuickRef.pdf

Verilog Problem Sets (great practice)

https://hdlbits.01xz.net/wiki/Problem_sets

Writing an FSM (a solid FSM is priceless)

https://inst.eecs.berkeley.edu//~cs150/sp12/resources/FSM.pdf

In-Depth Verilog Reference (goes well with a cup of coffee)

https://people.cs.georgetown.edu/~squier/Teaching/HardwareFundamentals/LC3-trunk/docs/verilog/VerilogLangRef.pdf

Difference between (System)Verilog, VDHL etc.

open-eda-course/slides/lec05.pdf at main · asinghani/open-eda-courseGitHub

Great course overall, this lec includes relevant sections from the paper above

What is SystemVerilog

https://lcdm-eng.com/papers/snug13_SNUG-SV-2013_Synthesizable-SystemVerilog_paper.pdf

Tutorials:

https://zipcpu.com/tutorial/

http://asic-world.com/verilog/veritut.html